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september 2013 doc id 018529 rev 2 1/21 1 vns3nv04dp-e omnifet ii fully autoprotected power mosfet features ecopack ? : lead free and rohs compliant automotive grade: compliance with aec guidelines linear current limitation thermal shutdown short circuit protection integrated clamp low current drawn from input pin diagnostic feedback through input pin esd protection direct access to the gate of the power mosfet (analog driving) compatible with sta ndard power mosfet description the vns3nv04dp-e device is made up of two monolithic chips (omnifet ii) housed in a standard so-8 package. the omnifet ii is designed using stmicroelectronics? vipower? m0-3 technology and is intended for replacement of standard power mosfets in up to 50 khz dc applications. built-in thermal shutdown, linear curren t limitation and overvoltage clamp protect the chip in harsh environments. fault feedback can be detected by monitoring voltage at the input pin max on-state resist ance (per ch.) r on 120 m current limitation (typ) i limh 3.5 a drain-source clamp voltage v clamp 40 v so-8 table 1. device summary package order codes tube tape and reel so-8 vns3nv04dp-e VNS3NV04DPTR-E www.st.com
contents vns3nv04dp-e 2/21 doc id 018529 rev 2 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16 3.4 status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 so-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
vns3nv04dp-e list of tables doc id 018529 rev 2 3/21 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 7. switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 8. source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 9. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 10. so-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 11. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
list of figures vns3nv04dp-e 4/21 doc id 018529 rev 2 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 7. input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 13. static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 14. transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 15. static drain-source on resistance vs id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 16. transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 17. turn-on current slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 18. turn-on current slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19. input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 20. turn-off drain source voltage slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 21. turn-off drain-source voltage slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 figure 22. capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 24. switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 25. output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 26. normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 27. normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 28. normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 29. step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 30. so-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 31. so-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 32. tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
vns3nv04dp-e block diagram and pin description doc id 018529 rev 2 5/21 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) source2 overvoltage linear drain1 source1 clamp current limiter over temperature gate control drain2 overvoltage clamp linear current limiter gate control over temperature input2 input1 drain 2 drain 1 drain 2 drain 1 input 2 source 1 source 2 input 1 1 4 5 8
electrical specifications vns3nv04dp-e 6/21 doc id 018529 rev 2 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality document. drain 1 input 1 source 2 i in1 v in1 input 2 i in2 source 1 drain 2 v in2 i d2 i d1 v ds1 v ds1 r in1 r in2 table 2. absolute maximum ratings symbol parameter value unit v dsn drain-source voltage (v inn = 0 v) internally clamped v v inn input voltage internally clamped v i inn input current +/- 20 ma r in minn minimum input series impedance 220 i dn drain current internally limited a i rn reverse dc output current -5.5 a v esd1 electrostatic discharge (r = 1.5 k , c = 100 pf) 4000 v v esd2 electrostatic discharge on output pins only (r = 330 , c=150pf) 16500 v p tot total dissipation at t c =25c 4 t j operating junction temperat ure internally limited c t c case operating temperature internally limited c t stg storage temperature -55 to 150 c
vns3nv04dp-e electrical specifications doc id 018529 rev 2 7/21 2.2 thermal data 2.3 electrical characteristics values specified in this section are for -40 c < t j < 150 c, unless otherwise stated. t j = 25 c, unless otherwise specified table 3. thermal data symbol parameter max value unit r thj-lead thermal resistance junction-lead (per channel) 30 c/w r thj-amb thermal resistance junction-ambient 80 (1) 1. when mounted on a standard single-sided fr4 board with 50mm 2 of cu (at least 35 m thick) connected to all drain pins of the relative channel c/w table 4. off symbol parameter test conditions min typ max unit v clamp drain-source clamp voltage v in =0v; i d = 1.5 a 40 45 55 v v clth drain-source clamp threshold voltage v in =0v; i d =2ma 36 v v inth input threshold voltage v ds =v in ; i d =1ma 0.5 2.5 v i iss supply current from input pin v ds =0v; v in = 5 v 100 150 a v incl input-source clamp voltage i in =1ma 6 6.8 8 v i in =-1ma -1 -0.3 v i dss zero input voltage drain current (v in =0v) v ds =13v; v in =0v; t j =25c 30 a v ds =25v; v in =0v 75 a table 5. on symbol parameter test conditions min typ max unit r ds(on) static drain-source on resistance v in =5v; i d = 1.5 a; t j = 25 c ? ? 120 m v in =5v; i d = 1.5 a ? ? 240 m table 6. dynamic symbol parameter test conditions min typ max unit g fs (1) forward transconductance v dd =13v; i d =1.5a ? 5.0 ? s c oss output capacitance v ds =13v; f=1mhz; v in =0v ? 150 ? pf
electrical specifications vns3nv04dp-e 8/21 doc id 018529 rev 2 -40 c < t j < 150 c, unless otherwise specified table 7. switching symbol parameter test co nditions min typ max unit t d(on) turn-on delay time v dd =15v; i d =1.5a; v gen =5v; r gen =r in min = 220 (see figure 4 ) 90 300 ns t r rise time 250 750 ns t d(off) turn-off delay time 450 1350 ns t f fall time 250 750 ns t d(on) turn-on delay time v dd =15v; i d =1.5a; v gen =5v; r gen =2.2k (see figure 4 ) 0.45 1.35 s t r rise time 2.5 7.5 s t d(off) turn-off delay time 3.3 10.0 s t f fall time 2.0 6.0 s (di/dt) on turn-on current slope v dd =15v; i d =1.5a; v gen =5v; r gen =r in min = 220 4.7 a/s q i total input charge v dd =12v; i d = 1.5 a; v in =5v; i gen =2.13ma (see figure 7 ) 8.5 nc table 8. source drain diode symbol parameter test conditions min typ max unit v sd (1) 1. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd =1.5a; v in =0v 0.8 v t rr reverse recovery time i sd = 1.5 a; di/dt = 12 a/s; v dd =30v; l=200h (see figure 5 ) 107 ns q rr reverse recovery charge 37 c i rrm reverse recovery current 0.7 a table 9. protections symbol parameter test co nditions min typ max unit i lim drain current limit v in =5v; v ds =13v 3.5 5 7 a t dlim step response current limit v in =5v; v ds = 13 v 10 s t jsh overtemperature shutdown 150 175 200 c t jrs overtemperature reset 135 c i gf fault sink current v in =5v; v ds =13v; t j =t jsh 10 15 20 ma e as single pulse avalanche energy starting t j =25c; v dd =24v; v in =5v; r gen =r in min =220 ; l=24mh (see figure 6 and figure 8 ) 100 mj
vns3nv04dp-e electrical specifications doc id 018529 rev 2 9/21 figure 4. switching time test circuit for resistive load figure 5. test circuit for diode recovery times t i d 90% 10% t v gen t d(on) t d(off) t f t r r gen v gen v d l=100uh a b 8.5 v dd r gen fast diode omnifet a d i s 220 b omnifet d s i v gen
electrical specifications vns3nv04dp-e 10/21 doc id 018529 rev 2 figure 6. unclamped inductive load test circuits figure 7. input charge test circuit r gen p w v in gen nd8003 v in
vns3nv04dp-e electrical specifications doc id 018529 rev 2 11/21 figure 8. unclamped inductive waveforms
electrical specifications vns3nv04dp-e 12/21 doc id 018529 rev 2 2.4 electrical char acteristics curves figure 9. source-drain diode forward characteristics figure 10. static drain-source on resistance figure 11. derating curve figure 12. static drain-source on resistance vs input voltage (part 1) figure 13. static drain-source on resistance vs input voltage (part 2) figure 14. transconductance 0123456789101112 id (a) 600 650 700 750 800 850 900 950 1000 1050 1100 vsd (mv) vin=0v 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 id(a) 0 100 200 300 400 500 600 700 800 900 1000 rds(on) (mohms) tj=25oc tj=150oc tj=-40oc vin=2.5v 3 3.5 4 4.5 5 5.5 6 6.5 vin(v) 0 25 50 75 100 125 150 175 200 225 250 275 300 rds(on) (mohms) id=3.5a id=1a id=3.5a id=1a id=3.5a id=1a tj=25oc tj=150oc tj=-40oc 3 3.5 4 4.5 5 5.5 6 6.5 vin(v) 0 25 50 75 100 125 150 175 200 225 250 rds(on) (mohms) id=1.5a tj=150oc tj=-40oc tj=25oc 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 id (a) 0 1 2 3 4 5 6 7 8 9 10 11 gfs (s) vds=13v tj=25oc tj=150oc tj=-40oc
vns3nv04dp-e electrical specifications doc id 018529 rev 2 13/21 figure 15. static drain-source on resistance vs id figure 16. transfer characteristics figure 17. turn-on current slope (part 1) figure 18. turn-on current slope (part 2) figure 19. input voltage vs input charge figure 20. turn-off drain source voltage slope (part 1) 00.511.522.533.5 4 id (a) 0 25 50 75 100 125 150 175 200 225 250 rds(on) (mohms) tj=25oc tj=150oc tj= - 40oc vin=5v 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 vin (v) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 idon (a) vds=13.5v tj=150oc tj=25oc tj=-40oc 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 di/dt(a/us) vin=5v vdd=15v id=1.5a 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 di/dt(a/usec) vin=3.5v vdd=15v id=1.5a 01234567891011 qg (nc) 0 1 2 3 4 5 6 7 8 9 vin (v) vds=1v id=1.5a 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 25 50 75 100 125 150 175 200 225 250 275 300 dv/dt(v/usec) vin=5v vdd=15v id=1.5a
electrical specifications vns3nv04dp-e 14/21 doc id 018529 rev 2 figure 21. turn-off drain-source voltage slope (part 2) figure 22. capacitance variations figure 23. switching time resistive load (part 1) figure 24. switching time resistive load (part 1) figure 25. output characteristics figure 26. normalized on resistance vs temperature 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 25 50 75 100 125 150 175 200 225 250 275 300 dv/dt(v/usec) vin=3.5v vdd=15v id=1.5a 0 5 10 15 20 25 30 35 vds(v) 50 100 150 200 250 300 350 c(pf) f=1mhz vin=0v 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.5 1 1.5 2 2.5 3 3.5 4 t(usec) vdd=15v id=1.5a vin=5v td(off) tr td(on) tf 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 vin(v) 0 100 200 300 400 500 600 700 800 900 t(nsec) vdd=15v id=1.5a rg=220ohm tf tr td(off) td(on) 012345678910 vds (v) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 id (a) vin=4v vin=5v vin=3v -50 -25 0 25 50 75 100 125 150 175 tc )oc) 0.5 1 1.5 2 2.5 3 3.5 4 rds(on) (mohm) vin=5v id=1.5a
vns3nv04dp-e electrical specifications doc id 018529 rev 2 15/21 figure 27. normalized input threshold voltage vs temperature figure 28. normalized current limit vs junction temperature figure 29. step response current limit -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 vinth (v) vds=vin id=1ma -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 0 1 2 3 4 5 6 7 8 9 10 ilim (a) vin=5v vds=13v 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 vdd(v) 7.5 8 8.5 9 9.5 10 10.5 11 11.5 12 12.5 13 tdlim(usec) vin=5v rg=220ohm
protection features vns3nv04dp-e 16/21 doc id 018529 rev 2 3 protection features during normal operation, the input pin is elec trically connected to the gate of the internal power mosfet through a low impedance path. the device then behaves like a standard power mosfet and can be used as a switch from dc up to 50 khz. the only difference from the user?s standpoint is that a small dc current i iss (typ. 100 a) flows into the input pin in order to supply the internal circuitry. the following sections describe the device features. 3.1 overvoltage clamp protection internally set at 45 v, along with the rugged avalanche characteristics of the power mosfet stage give this device unrivalled r uggedness and energy hand ling capability. this feature is mainly important when driving inductive loads. 3.2 linear current limiter circuit limits the drain current i d to i lim whatever the input pin voltages. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and junc tion temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold t jsh. 3.3 overtemperature and short circuit protection these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. overtemperature cutout occurs in the range 150 to 190 c, a typical value being 170 c. the device is automatically restarted when the chip temperature falls of about 15 c below shutdown temperature. 3.4 status feedback in the case of an overtemperature fault condition (t j > t jsh ), the device tries to sink a diagnostic current i gf through the input pin in order to indicate fault condition. if driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. if the drive impedance is high enough so that the input pin driver is not able to supply the current i gf , the input pin falls to 0 v. this however not affects the device operation: no requirement is put on the current capability of th e input pin driver except to be able to supply the normal operation drive current i iss . additional features of this device are esd protection according to the human body model and the ability to be driven from a ttl logic circuit.
vns3nv04dp-e package and packing information doc id 018529 rev 2 17/21 4 package and packing information 4.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.2 so-8 mechanical data table 10. so-8 mechanical data dim. mm min. typ. max. a 1.75 a1 0.10 0.25 a2 1.25 b 0.28 0.48 c 0.17 0.23 d (1) 1. dimension ?d? does not include mold fl ash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side). 4.80 4.90 5.00 e 5.80 6.00 6.20 e1 (2) 2. dimension ?e1? does not include interlead flash or pr otrusions. interlead flash or protrusions shall not exceed 0.25 mm per side. 3.80 3.90 4.00 e 1.27 h 0.25 0.50 l 0.40 1.27 l1 1.04 k 0 8 ccc 0.10
package and packing information vns3nv04dp-e 18/21 doc id 018529 rev 2 figure 30. so-8 package dimension 0016023 d
vns3nv04dp-e package and packing information doc id 018529 rev 2 19/21 4.3 so-8 packing information figure 31. so-8 tube shipment (no suffix) figure 32. tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 3.2 b 6 c ( 0.1) 0.6 c b a all dimensions are in mm. base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
revision history vns3nv04dp-e 20/21 doc id 018529 rev 2 5 revision history table 11. document revision history date revision changes 09-mar-2011 1 initial release. 18-sep-2013 2 updated disclaimer
vns3nv04dp-e doc id 018529 rev 2 21/21 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particul ar purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ? automotive, automotive safe ty or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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